DC Biasing-FETs

mcqspedia.com has 31 Question/Answers about Topic DC Biasing-FETs

What is the approximate current level in the gate of an FET in dc analysis?

What is the approximate current level in the gate of an FET in dc analysis?
  • A. 0 A
  • B. 0.7 mA
  • C. 0.3 mA
  • D. Undefined
  • Correct Answer: Option A

Which of the following current equations is true?

Which of the following current equations is true?
  • A. IG = ID
  • B. IG = IS
  • C. ID = IS
  • D. IG = ID = IS
  • Correct Answer: Option C

The input controlling variable for a(n) ________ is a current level and a voltage level for a(n) ________.

The input controlling variable for a(n) ________ is a current level and a voltage level for a(n) ________.
  • A. BJT, FET
  • B. FET, BJT
  • C. FET, FET
  • D. BJT, BJT
  • Correct Answer: Option A

Which of the following is (are) true of a self-bias configuration compared to a fixed-bias configuration?

Which of the following is (are) true of a self-bias configuration compared to a fixed-bias configuration?
  • A. One of the dc supplies is eliminated.
  • B. A resistor RS is added.
  • C. VGS is a function of the output current ID.
  • D. All of the above
  • Correct Answer: Option D

Which of the following represents the voltage level of VGS in a self-bias configuration?

Which of the following represents the voltage level of VGS in a self-bias configuration?
  • A. VG
  • B. VGS(off)
  • C. VS
  • D. VP
  • Correct Answer: Option C

Which of the following is a false statement regarding the dc load line when comparing self-bias and voltage-divider configurations?

Which of the following is a false statement regarding the dc load line when comparing self-bias and voltage-divider configurations?
  • A. Both are linear lines.
  • B. Both cross the origin.
  • C. Both intersect the transfer characteristics.
  • D. Both are obtained by writing Kirchhoff's voltage law (KVL) at the input side loop.
  • Correct Answer: Option B

Which of the following describe(s) the difference(s) between JFETs and depletion-type MOSFETs?

Which of the following describe(s) the difference(s) between JFETs and depletion-type MOSFETs?
  • A. VGS can be positive or negative for the depletion-type.
  • B. ID can exceed IDSS for the depletion-type.
  • C. The depletion-type can operate in the enhancement mode.
  • D. All of the above
  • Correct Answer: Option D

On the universal JFET bias curve, the vertical scale labeled ________ can, in itself, be used to find the solution to ________ configurations.

On the universal JFET bias curve, the vertical scale labeled ________ can, in itself, be used to find the solution to ________ configurations.
  • A. m, fixed-bias
  • B. M, fixed-bias
  • C. M, voltage-bias
  • D. m, voltage-bias
  • Correct Answer: Option A

Through proper design, a ________ can be introduced that will affect the biasing level of a voltage-controlled JFET resistor.

Through proper design, a ________ can be introduced that will affect the biasing level of a voltage-controlled JFET resistor.
  • A. photodiode
  • B. thermistor
  • C. laser diode
  • D. Zener diode
  • Correct Answer: Option B

For the field-effect transistor, the relationship between the input and the output quantities is ________.

For the field-effect transistor, the relationship between the input and the output quantities is ________.
  • A. linear
  • B. nonlinear
  • C. 3rd degree
  • D. None of the above
  • Correct Answer: Option B

The input controlling variable for an FET transistor is a ________ level.

The input controlling variable for an FET transistor is a ________ level.
  • A. resistor
  • B. current
  • C. voltage
  • D. All of the above
  • Correct Answer: Option C

The controlled variable on the output side of an FET transistor is a ________ level.

The controlled variable on the output side of an FET transistor is a ________ level.
  • A. current
  • B. voltage
  • C. resistor
  • D. None of the above
  • Correct Answer: Option A

For ________, Shockley’s equation is applied to relate the input and the output quantities.

For ________, Shockley’s equation is applied to relate the input and the output quantities.
  • A. JFETs
  • B. depletion-type MOSFETs
  • C. enhancement-type MOSFETs
  • D. JFETs and depletion-type MOSFETs
  • Correct Answer: Option D

The coupling capacitors are ________ for the dc analysis and ________ for the ac analysis.

The coupling capacitors are ________ for the dc analysis and ________ for the ac analysis.
  • A. open-circuit, low impedance
  • B. short-circuit, low impedance
  • C. open-circuit, high impedance
  • D. None of the above
  • Correct Answer: Option A

In a fixed-bias configuration, the voltage level of VGS is equal to ________.

In a fixed-bias configuration, the voltage level of VGS is equal to ________.
  • A. VS
  • B. VG
  • C. VGS(off)
  • D. VP
  • Correct Answer: Option B

The ratio of current ID to IDSS is equal to ________ for a fixed-bias configuration.

The ratio of current ID to IDSS is equal to ________ for a fixed-bias configuration.
  • B. 0.25
  • C. 0.5
  • D. 1
  • Correct Answer: Option D

When plotting the transfer characteristics, choosing VGS = 0.5VP will result in a drain current level of ________ IDSS.

When plotting the transfer characteristics, choosing VGS = 0.5VP will result in a drain current level of ________ IDSS.
  • B. 0.25
  • C. 0.5
  • D. 1
  • Correct Answer: Option B

The dc load line is drawn using the equation obtained by applying Kirchhoff’s voltage law (KVL) at ________ side loop(s) of the circuit.

The dc load line is drawn using the equation obtained by applying Kirchhoff’s voltage law (KVL) at ________ side loop(s) of the circuit.
  • A. the output
  • B. the input
  • C. both the input and output
  • D. None of the above
  • Correct Answer: Option B

The slope of the dc load line in a self-bias configuration is controlled by ________.

The slope of the dc load line in a self-bias configuration is controlled by ________.
  • A. VDD
  • B. RD
  • C. RG
  • D. RS
  • Correct Answer: Option D

________ levels of RS result in ________ quiescent values of ID and ________ negative values of VGS.

________ levels of RS result in ________ quiescent values of ID and ________ negative values of VGS.
  • A. Increased, lower, less
  • B. Increased, higher, less
  • C. Increased, higher, more
  • D. Increased, less, lower
  • Correct Answer: Option A