pipelining implementation

mcqspedia.com has 5 Question/Answers about Topic pipelining implementation

MIPS pipeline with appropriate registers, called pipeline registers or also known as

MIPS pipeline with appropriate registers, called pipeline registers or also known as
  • A. Pipeline latches
  • B. Pipe stages
  • C. Pipeline hits
  • D. Pipeline buffers
  • Correct Answer: Option A

A processor with separate decode and register fetch stages will probably have a

A processor with separate decode and register fetch stages will probably have a
  • A. Canceling
  • B. Nullifying
  • C. Branch delay
  • D. Branch table
  • Correct Answer: Option C

Every MIPS instruction can be implemented in at most

Every MIPS instruction can be implemented in at most
  • A. 2 clock cycles
  • B. 3 clock cycles
  • C. 4 clock cycles
  • D. 5 clock cycles
  • Correct Answer: Option D

Process of letting an instruction move from instruction decode stage into execution stage of this pipeline is usually called

Process of letting an instruction move from instruction decode stage into execution stage of this pipeline is usually called
  • A. Canceling
  • B. Instruction issue
  • C. Nullifying
  • D. Branch prediction
  • Correct Answer: Option B

With separate adder and a branch decision made during ID, there is only a

With separate adder and a branch decision made during ID, there is only a
  • A. 1-clock-cycle stall on branches
  • B. 2-clock-cycles stall on branches
  • C. 3-clock-cycles stall on branches
  • D. 4-clock-cycles stall on branches
  • Correct Answer: Option A