computer architecture memory hierarchy

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Ratio of cache accesses, results in a miss is known as

Ratio of cache accesses, results in a miss is known as
  • A. Hit miss
  • B. Hit rate
  • C. File caches
  • D. Miss rate
  • Correct Answer: Option D

Processor’s performance can be calculated as

Processor’s performance can be calculated as
  • A. CPU execution time = (CPU clock cycles - Memory stall cycles)
  • B. CPU execution time = (CPU clock cycles + Memory stall cycles)
  • C. CPU execution time = (CPU clock cycles + Memory stall cycles) - Clock cycle time
  • D. CPU execution time = (CPU clock cycles x Memory stall cycles) + Clock cycle time
  • Correct Answer: Option B

Address spaces are typically broken into fixed-size blocks, called

Address spaces are typically broken into fixed-size blocks, called
  • A. Registers
  • B. Stacks
  • C. Pages
  • D. Frames
  • Correct Answer: Option C

When Cycle per instruction is 1.0, data accesses are 50% of total instructions, and miss penalty is 25clock-cycles and miss rate having 2%, then computer would faster as,

When Cycle per instruction is 1.0, data accesses are 50% of total instructions, and miss penalty is 25clock-cycles and miss rate having 2%, then computer would faster as,
  • A. 1.25
  • B. 1.45
  • C. 1.75
  • D. 1.85
  • Correct Answer: Option C

Per memory reference, miss-rate can be turned into per instruction misses rate by

Per memory reference, miss-rate can be turned into per instruction misses rate by
  • A. Miss rate= Memory accesses/ instructions
  • B. Miss rate= Memory accesses* instructions
  • C. Miss rate= Memory accesses-instructions
  • D. Miss rate= Memory accesses+ instructions
  • Correct Answer: Option A